Toshiba’s low-power SRAM chip aims to cut device drain

Toshiba noted its technology advancement is suited for smartphones and other mobile products. The technology reduces active and standby power in temperatures ranging from room temperature to high temperature through use of this BLPC and DCRC.

Tokyo-based Toshiba further noted that “longer battery life requires lower power consumption in both high performance and low performance modes (MP3 decoding, background processing, etc.). As low performance applications require only tens of MHz operation, SRAM temperature remains around RT, where active and leakage power consumptions are comparable. Given this, the key issue is to reduce active and standby power from HT to RT.”

© 2013 Phys.org